상세 보기
DSConvNet: A Lightweight Architecture for Extracting Image Features From Depthwise Separable Convolution Network for Edge Devices
- Muhammad Raza, Syed;
- Murtaza Hussain Abidi, Syed;
- Masuduzzaman, Md;
- Shin, Soo Young
WEB OF SCIENCE
2SCOPUS
1초록
This paper presents DSConvNet, a novel architecture based on depthwise separable convolutional blocks for efficient multi-class image classification. Despite progress in compact convolutional neural networks (CNNs), many existing models still impose high computational costs on resource-constrained devices, limiting their real-time applicability. To address this, DSConvNet employs four optimized DSConvNet blocks that reduce parameters, accelerate inference, and stabilize training. Each block combines a 2D convolution, depthwise convolution, batch normalization, and max-pooling, forming an efficient yet expressive feature extractor. The resulting architecture achieves lower complexity, mitigates overfitting, and improves generalization. DSConvNet was evaluated on nine benchmark datasets GTSRB, BTSC, CIFAR-10, CIFAR-100, MNIST, Fashion-MNIST, Imagewoof, Imagenette, and Caltech-101 covering 100 object categories. Without GPU acceleration, the model attained 99.10% accuracy on GTSRB and 98.90% on BTSC, confirming its suitability for real-time edge-based image classification under limited computational resources.
키워드
- 제목
- DSConvNet: A Lightweight Architecture for Extracting Image Features From Depthwise Separable Convolution Network for Edge Devices
- 저자
- Muhammad Raza, Syed; Murtaza Hussain Abidi, Syed; Masuduzzaman, Md; Shin, Soo Young
- 발행일
- 2025-01
- 유형
- Article
- 저널명
- IEEE Access
- 권
- 13
- 페이지
- 210102 ~ 210116
- 언어
- ENG
- 출판사
- IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
- 발행국가
- 미국
- 분량
- 15 페이지
- ISSN
- E 2169-3536
P 2169-3536