FPGA-based Inference Parallelization for Onboard RL-based Routing in Dynamic LEO Satellite Networks

초록

This paper addresses the problem of onboard computer application of dynamic low-orbit satellite network routing algorithms. In low-orbit satellite networks, the satellite topology changes in real time, and satellite disconnection occurs frequently. The problem of routing algorithms for low-orbit satellites can be solved by reinforcement learning algorithms. However, the inference process based on deep reinforcement learning models suffers from excessive computation due to the operation of multiple convolutional layers. In this paper, we propose a method to accelerate convolutional layer operations by parallelizing them using heterogeneous processors. This approach is compared to the traditional single-processor-based convolutional operation method, commonly used in dynamic low-orbit satellite network routing algorithms. Our evaluation, conducted on an actual heterogeneous processor-based onboard computer, demonstrates that the proposed method not only matches the accuracy of the conventional single-processor-based approach, but also significantly reduces the execution time.

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