Effects of Carrier Trapping and Noise in Triangular-Shaped GaN Nanowire Wrap-Gate Transistor

초록

The most widely used nanowire channel architecture for creating state-of-the-art high-performance transistors is the nanowire wrap-gate transistor, which offers low power consumption, high carrier mobility, large electrostatic control, and high-speed switching. The frequency-dependent capacitance and conductance measurements of triangular-shaped GaN nanowire wrap-gate transistors are measured in the frequency range of 1 kHz-1 MHz at room temperature to investigate carrier trapping effects in the core and at the surface. The performance of such a low-dimensional device is greatly influenced by its surface traps. With increasing applied frequency, the calculated trap density promptly decreases, from 1.01 x 10(13) cm(-2) eV(-1) at 1 kHz to 8.56 x 10(12) cm(-2)eV(-1) at 1 MHz, respectively. The 1/f-noise features show that the noise spectral density rises with applied gate bias and shows 1/f-noise behavior in the accumulation regime. The fabricated device is controlled by 1/f-noise at lower frequencies and 1/f(2)-noise at frequencies greater than similar to 0.2 kHz in the surface depletion regime. Further generation-recombination (G-R) is responsible for the 1/f(2)-noise characteristics. This process is primarily brought on by electron trapping and detrapping via deep traps situated on the nanowire's surface depletion regime. When the device works in the deep-subthreshold regime, the cut-off frequency for the 1/f(2)-noise characteristics further drops to a lower frequency of 30 Hz-10(4) Hz.

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