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An FPGA-Accelerated CNN with Parallelized Sum Pooling for Onboard Realtime Routing in Dynamic Low-Orbit Satellite Networks
- Kim, Hyeonwoo;
- Park, Juhyeon;
- Lee, Heoncheol;
- Won, Dongshik;
- Han, Myonghun
WEB OF SCIENCE
8SCOPUS
10초록
This paper addresses the problem of real-time onboard routing for dynamic low earth orbit (LEO) satellite networks. It is difficult to apply general routing algorithms to dynamic LEO networks due to the frequent changes in satellite topology caused by the disconnection between moving satellites. Deep reinforcement learning (DRL) models trained by various dynamic networks can be considered. However, since the inference process with the DRL model requires too long a computation time due to multiple convolutional layer operations, it is not practical to apply to a real-time on-board computer (OBC) with limited computing resources. To solve the problem, this paper proposes a practical co-design method with heterogeneous processors to parallelize and accelerate a part of the multiple convolutional layer operations on a field-programmable gate array (FPGA). The proposed method was tested with a real heterogeneous processor-based OBC and showed that the proposed method was about 3.10 times faster than the conventional method while achieving the same routing results.
키워드
- 제목
- An FPGA-Accelerated CNN with Parallelized Sum Pooling for Onboard Realtime Routing in Dynamic Low-Orbit Satellite Networks
- 저자
- Kim, Hyeonwoo; Park, Juhyeon; Lee, Heoncheol; Won, Dongshik; Han, Myonghun
- 발행일
- 2024-06
- 유형
- Article
- 저널명
- ELECTRONICS
- 권
- 13
- 호
- 12
- 언어
- ENG
- 출판사
- MDPI
- 발행국가
- 스위스
- ISSN
- E 2079-9292